Currently, an EEPROM (Electrically-Erasable-and-Programmable-ROM) capable of electrically performing a rewrite operation is known as one of MOS memory devices. This device has a structure in which a silicon oxide film is formed on a semiconductor substrate, at least one silicon nitride film is formed on the silicon oxide film, a silicon oxide film is additionally formed on the silicon nitride film, and a control gate electrode is formed on the additionally formed silicon oxide film (for example, refer to FIGS. 1 and 2 of Patent Document 1). The EEPROM rewrites data ┌1┘ and ┌0┘ by applying a voltage between the semiconductor substrate and the control gate electrode to accumulate electrons or holes mainly on an interface between the silicon nitride film and the silicon oxide films, or in the silicon nitride film, of dielectric films (a dielectric film laminate) of the laminate structure.
A conventional art will be explained below, for example, in case that electrons are injected into the dielectric film laminate as a charge accumulation region. First, 0 V is applied to the semiconductor substrate, and for example, 10 V is applied to the control gate electrode. Accordingly, a strong electric field is applied to the dielectric film laminate between the semiconductor substrate and the control gate electrode, and thus electrons are injected due to tunneling effect through the lower silicon oxide film from the semiconductor substrate to the silicon nitride film. Then, the injected electrons are trapped mainly in the silicon nitride film, or around the interface between the silicon nitride film and the lower silicon oxide film or between the silicon nitride film and the upper silicon oxide film, thereby being accumulated as data.
However, an important performance required for a nonvolatile semiconductor memory device, such as EEPROM, is data holding characteristics. In order for a conventional MOS memory device to stably hold the electrons trapped in the silicon nitride film or around the interface between the silicon nitride film and the lower silicon oxide film or between the silicon nitride film and the upper silicon oxide film, thicknesses of the upper and lower silicon oxide films need to be large. However, if the thicknesses of the upper and lower silicon oxide films are large, an electric field applied to the dielectric film laminate during a data write operation is weakened, thereby reducing a data write speed.
Although the above problem may be solved by increasing the strength of an electric field applied to the dielectric film laminate, a data write voltage needs to be increased in order to increase the strength of the electric field. However, if so, power consumption of the semiconductor memory device is increased and a probability that the dielectric films are destructed is increased, thereby greatly lowering the reliability of the semiconductor memory device.    (Patent Document 1) Japanese Laid-open Patent Publication No. 2002-203917